1. Technical Field of the Invention
The present invention relates to a method for manufacturing a semiconductor device including an insulating film on a semiconductor substrate (wafer). More particularly, it relates to a method for manufacturing semiconductor device which can completely eliminate voids (bubbles) generated in the insulating film or open pores generated owing to insufficient filling-in of the insulating film.
2. Description of the Related Art
For example, in steps of manufacturing a semiconductor device, an MOSFET gate electrode is formed on a semiconductor substrate to protrude therefrom, whereby a concave portion is formed between the gate electrode and a gate electrode adjacent to the electrode, and a concave portion, a convex portion and a stepped portion (trench) are made in the gate electrode and between the gate electrodes. When this stepped portion enlarges, there occurs focus deviation during drawing of a wiring pattern by exposure. In a case where wiring lines are formed to intersect with one another, a lap portion of an intersecting portion becomes thin, and this causes disconnection. Such problems are generated which result in defects of the semiconductor device. To solve the problems, as a method of eliminating such stepped portion, an inter layer dielectric such as a BPSG film or a PSG film is formed on the stepped portion by a chemical vapor deposition (CVD), and the surface of this inter layer dielectric is flattened by a certain method.
In recent years, as there have progressed the miniaturization and high densification of semiconductor devices with high integration and capacity enlargement thereof, an aspect ratio (ratio of a depth-direction dimension with respect to a lateral dimension of a structure) of each structure rises, and the stepped portion of the structure tends to enlarge in a preparing step. Therefore, there rises a probability that voids (bubbles) are generated in the insulating film during formation of the above inter layer dielectric, and open pores are sometimes generated in the insulating film owing to unevenness of the formation of the insulating film in the trench or lack of a film formation amount (film formation defect). FIGS. 1A and 1B show sectional shapes of a semiconductor device in the process of the manufacturing of a conventional semiconductor device, FIG. 1A shows a case where a void 53 is generated in an inter layer dielectric 52 formed on a concave and convex portion 51 formed by an element on a semiconductor substrate 50, and FIG. 1B shows a case where an open pore 54 is generated in the inter layer dielectric 52. It is to be noted that in FIGS. 1A and 1B, reference numeral 55 denotes a barrier layer.
Heretofore, the semiconductor substrate on which the inter layer dielectric has been formed is subjected to a heat treatment at a temperature of 900° C. in an inert gas atmosphere under a normal pressure (0.1 MPa) or subjected to a heat treatment at a temperature slightly below 900° C. in the atmosphere containing oxygen or water vapor under the normal pressure, thereby fluidizing (reflowing) the insulating film to thereby flatten the film. By this reflow treatment, the voids or the open pores generated in the insulating film have been eliminated. As prior arts associated with this method, the following patent documents 1 and 2 are disclosed.
The “method for flattening insulating film of semiconductor device” of Patent Document 1 has a purpose of effectively conducting a reflow treatment on a BPSG film of a semiconductor device at comparatively low temperature in a short period of time. In a method in which the insulating film formed on the concave and convex surface of a substrate of the semiconductor device is flattened by thermal reflow, the thermal reflow is performed in the atmosphere containing oxygen or water vapor under a pressure of 0.3 MPa or more. Moreover, according to this method, the quantity of oxygen to be diffused on the insulating film and the diffusion speed increase, and excellent reflow of the BPSG film is accomplished at a low temperature for a short period of time as compared with a conventional method.
The “method for manufacturing semiconductor device” of Patent Document 2 has a purpose of obtaining flatness which is sufficient for performing a low-temperature treatment. After an element is formed on a semiconductor substrate, a silicon nitride film is formed on this element. On this film, a BPSG film containing boron and phosphorus is formed, and further on this film, an SOG film containing at least one of boron and phosphorous is formed by a coating method. Then, the substrate is heat-treated in a high-pressure atmosphere containing water vapor. Therefore, the SOG film is gelatinized and flattened by a high external pressure which is applied to the film itself.
[Patent Document 1]
Japanese Unexamined Patent Publication No. 5-67607
[Patent Document 2]
Japanese Unexamined Patent Publication No. 10-275805
In the above “method for flattening insulating film of semiconductor device” of Patent Document 1, the heat treatment can be performed at 800° C. which is lower than a conventional reflow treatment temperature. In the “method for manufacturing semiconductor device” of Patent Document 2, the reflow treatment temperature can be set to 700° C. or less. It can be expected that the insulating film can be fluidized by the reflow treatment to eliminate the voids or the open pores generated in the insulating film. However, since the heat treatment temperature of 700° C. to 800° C. as in Patent Documents 1 and 2 adversely affects characteristics of the element to be miniaturized, there is a demand for a further decrease of the treatment temperature to reduce damages due to the heat treatment in further integrating the semiconductor device. Even in the treatment at the high temperature, in which a high fluidity is obtained, the voids remain sometimes without being completely eliminated, depending on a position where the voids have been generated or a size of the voids. The remaining voids might cause a device defect. Especially as the size of the voids is decreased, an effect produced by buoyancy during the fluidization deteriorates, and this increasingly raises a possibility that the voids remain. In a case where the open pores are generated in the insulating film, the surface of the open pores is flattened by surface tension of the insulating film during the reflow treatment, but the open pores are not closed, or the concave and convex portion (trenches) is not filled in.